【電機系書報討論演講訊息】 

電機系書報討論網頁：https://lms.nthu.edu.tw/course/38158

電機系演講公告網址：/p/403-1175-2629-1.php

題  目：Challenges and Trends in Modern SoC Design Verification: 談驗證技術與挑戰

講  員：蔡明甫 副處長【創意電子】

時      間：2019年03月08日(星期五) 下午2時20分

                     (2:10PM入場，為維持演講品質，2:30PM後不開放入場)

地      點：清華大學資電館B01演講廳

主持人：呂仁碩 老師

內容摘要：
1. 現今系統晶片之驗證技術挑戰
2. 加入晶片設計產業之準備與經驗分享

講員簡歷：
【創意電子】設計驗證處 副處長
【Broadcom】2005 ~ 2017 資深經理
【源捷科技】2001 ~ 2005 副理
國立清華大學 1999 ~ 2001 電機系 碩士
國立清華大學 1995 ~ 1999 電機系 學士

Mr. Ming-Fu Tsai currently serves as the Deputy Director at Global Unichip Corporation since Sep. 2017. He is responsible to lead Design Verification team to incorporate the state-of-the-art verification methodology to verify SOCs for the application of AI & High-Performance Computing. He has more than 16 years Design Verification experience on verification methodology/solution for delivering product with highest quality. He served as Senior DV Manager of Switching Products Division at Broadcom Taiwan Design Center, responsible for project DV of every Ethernet Switch (ROBOSwitch, StrataXGS), Network Processor (StrataGX), and IPs developed by ING/CSG in Taiwan. He formed up and managed Design Verification team at Taiwan Design Center since April 2008; and had grown the DV team from 4 members to 20 in Taiwan and 15 in Bulgaria. His team defined and developed DV methodology/environment for StrataGX SoC which incorporates the up-to-date DV techniques such as SystemVerilog OOPs, Formal Verification, X-Verification, Assertion Synthesis, and Emulation. He started his career as design engineer at SOTA Design Technology Inc. and later formed up Design Verification team in Shanghai office of SOTA Design Technology in 2003. In 2001, Mr. Ming-Fu Tsai graduated from National Tsing Hua University with a M.S. degree in Electrical Engineering.

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