[2018-09-21] 楊家驤 教授:Accelerating Data Analysis for Next-Generation Sequencing.
【電機系書報討論演講訊息】
電機系書報討論網頁:https://lms.nthu.edu.tw/course/35457
電機系演講公告網址:/p/403-1175-2629-1.php
題 目:Accelerating Data Analysis for Next-Generation Sequencing.
講 員:楊家驤 教授【台灣大學電機工程學系】
時 間:2018年9月21日(星期五) 下午2時20分
(2:10PM入場,為維持演講品質,2:30PM後不開放入場)
地 點:清華大學資電館B01演講廳
主持人:呂仁碩 老師
~歡 迎 聽 講~

Bio:
Chia-Hsiang Yang received his B.S. and M.S. degrees from the National Taiwan University, Taiwan, in 2002 and 2004, respectively, all in Electrical Engineering. He received his Ph.D. degree from the Department of Electrical Engineering of the University of California, Los Angeles in 2010. He then joined the faculty of the Electronics Engineering Department at the National Chiao Tung University, Taiwan. In 2015, he moved to the National Taiwan University, Taiwan, where he is currently an Associate Professor. His research interests include energy-efficient integrated circuits and architectures for biomedical and communication signal processing.
Dr. Yang was a winner of the DAC/ISSCC Student Design Contest in 2010. He received the 2010-2011 Distinguished Ph.D. Dissertation in Circuits & Embedded Systems Award from the Department of Electrical Engineering, University of California, Los Angeles. In 2013, he was a co-recipient of the ISSCC Distinguished-Technical-Paper Award and Demonstration Session Certification of Recognition. He is also the advisor for several student awards, including the 2017 ISSCC Silkroad Award. He served on the IEEE Asian Solid-State Circuit Conference (A-SSCC) Technical Program Committee (TPC) and was the TPC Vice-Chair for 2017 A-SSCC. He served as a Guest Editor of the IEEE Journal of Solid-State Circuits (JSSC) and is also serving as an Associate Editor of the IEEE Signal Processing Letters (SPL).
