[2011-10-14] 李朝政 副總:Some fundamental problems relating to 3D IC and process nodes beyond 28nm.

【電機系書報討論演講訊息】 

 

書報討論網址:http://www.ee.nthu.edu.tw/~ee591000/
 

題   目:Some fundamental problems relating to 3D IC and process nodes beyond 28nm

 

講   員:李朝政 副總 (瑞昱半導體)

 

時間與地點:20111014(星期五)下午210分,資電館B01演講廳
 

Abstract

    This lecture will address some fundamental problems about 3D IC from electro magmatic point of  viewAnd also will address some fundamental problems for process nodes beyond 28nm , including fault diagnosismismatchsoft error ……This lecture will also briefly discuss fault tolerant design

 

講者簡介:

    Chao-Cheng Lee received the B.S. degree from National Chiao-Tung University in 1988 in electrical engineering.  And he received the M.S. degree from National Taiwan University in 1990 in physics.

    He joined Realtek Semiconductor in 1992 and is currently the Senior Vice President of Engineering in Realtek.  His research interests includes PLL, filter, high speed OP, mismatch calibration.  He has more than 30 U.S. patents granted or pending.

 

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